1. Field of the Invention
This invention relates to a semiconductor device, and more precisely to a semiconductor device in which some segments of the wiring are replaced with optical waveguides to achieve signal transmission using optical means.
2. The Prior Art
In recent years, large scale integrated circuits (LSI) have become more and more integrated, and the wiring (metallization) which electrically connects circuit elements has become more dense. With the progress of higher integration, it becomes more and more difficult to place the wiring on a two-dimensional plane without crossing each other, so the wiring has been one of the obstacles of higher integration, Therefore, multi-layer wiring, which comprises three-dimensional wiring, has been introduced.
However, the following problems remain with multi-layer wiring: 1) the problem of the contact resistance between the upper and lower wiring, 2) the problem of the wiring materials, 3) the problems of the insulation materials which insulate between the upper and lower wiring, and 4) the problem of shape control such as planarization. All of these are difficult problems.
As a result, a technique has been proposed (Jpn. J. Appl. Phys. Vol. 32 (1993), p270) which replaces some segments of the LSI wiring with optical waveguides in the optical plate provided outside and optically transmits signals. According to this method, as shown in FIG. 6, an optical plate 20 made of quartz glass in which an optical waveguide(s) is formed is sandwiched between two integrated circuit substrates 10a and 10b comprising an integrated circuit 12 formed on a semiconductor single crystal substrate 11, and optical signals are transmitted through said optical plate 20 between a laserdiode (LD) 13 and a photodiode (PD) 14 provided in the integrated circuit substrates 10.
The method described above is an epoch making method which replaces part of the wiring conventionally done only using aluminum and such metal wiring with optical signal transmission, and introduction of this method into practical use is receiving attention.
However, the problems accompanying higher integration of LSI's, as described above, include not only the difficulties in the wiring process but also problems due to the structure of the integrated circuit substrate. That is, the conventional configuration of an integrated circuit substrate, in which the integrated circuit is formed on a semiconductor single crystal substrate made of bulk crystal, has devices formed on bulk crystal, and because of this, parasitic effects such as latch-ups due to generation of thyristor structures and parasitic capacity are produced and affect the characteristics of the devices. With the progress of even higher integration, these kinds of problems have become more and more conspicuous, and development of a means to simultaneously solve both said wiring problems and the problems due to the parasitic effects have been desired.